CTRIO count preload.

[jackeroo31]

I have a problem that is driving me crazy and I cannot find the solution. I have searched the forums and did not locate an answer.

I have using a CTRIO in slot 4 of a DL06. I am using as an encoder input for axis control.

I have found and understand how to make the counter retentive on power recycle, but I need to preload this counter with a value.

This value will be determined by the operator. What I want to do is press a command button on the HMI will send this this given quota to the CTRIO. I can activate the reset command B3054.1 and it works, but the value resets to '0'. I need to preload this value, then reset the counter to this adjusted value.

I can do this through the CTRIO workbench, but I need to do this at runtime.

I have the CTRIO inputs addressed to V3000 and outputs to V3030.

Any help would be appreciated.

[rlp122]

See Page 9-9 of the Hx-CTRIO User Manaul over on on the AutomationDirect.com website.

[jackeroo31]

That is exactly what I want to do. I found this for Do-more. Ds5 does not have this. Why? I don't know, but it does not.

[b_carlton]

Here is a page from the older manual. Maybe it will help.

[rlp122]

Sorry, I linked to the wrong chapter.  Here is the correct one.

[Greg]

Jackeroo31, you must use the WT instruction to write 8 bytes total to the CTRIO's Shared RAM starting at address 80 (hex).

The 8 bytes:
- 1st 2 bytes: 0004 (hex) "Write One Register"
- Next 2 bytes: [RegisterCode]:
     0000 = Ch1/Fn1
     0001 = Ch1/Fn2
     0002 = Ch2/Fn1
     0003 = Ch2/Fn2
     0004 = Output0
     0005 = Output1
     0006 = Output2
     0007 = Output3
     0008 = Ch1/Fn1 Reset
     0009 = Ch1/Fn2 Reset
     000A = Ch2/Fn1 Reset
     000B = Ch2/Fn2 Reset
- Next 4 bytes: [Data], i.e. the count value

So this amounts to something like:
LD K0104 (I think this is correct for Slot4 in DL06)
LD K8
LD K80
WT V4000 (or wherever you store the above 8 bytes)

Then you will Set the Process System Command bit and wait for the System Command Complete bit (for success) or the System Command Error bit (for failure).