It appears from the PEERLINK status that those first 3 blocks are inhibited (by the publisher and/or subscriber). Blocks 1, 2, and 3 in your PEERLINK status screen shot appear to be grayed out. Check out your PL.xxInh "Inhibit" bits in a Data View (check all the PL heap item structure members and make sure they are all what you expect - some are readonly, some are read/write)
From the PEERLINK help topic DMD0300:
Green, Yellow, or Red background with Grayed Numeral indicates that updates to the block have been inhibited,in the example above Blocks 3 and 5 have their updates inhibited. The inhibit bits for the blocks allow both the publisher and the subscribers to control updates to the CPU's PEERLINK memory.
In the PLC that is publishing the block, setting the inhibit bit prevents that block from being published.
In the PLC that is subscribing to a block, setting the inhibit bit prevents that block from being updated in the CPU.