Outputs in stages

[DLTimmons]

I have some outputs in stages that I would rather not use set bit on. I get this Message "FrontLift@17   M222 OUT Y7 coil duplicated 3 other times at FrontLower@19 BackLift@17 BackLower@19" I have three stages that I need the output on and the rest of the time I want them off.

How be the best way to handle this?

[franji1]

Having multiple OUT coils across multiple "mutually exclusive" Stages is not just normal, but a powerful feature of Stage.

OUT coils inside an enabled stage will automatically turn OFF once the Stage is disabled, like via a JMP or a SGRST.  No need to use SET/RST on the OUT coil bit.  As long as the stages they are used will never be enabled simultaneously, the OUT coils will behave exactly as you desire.

The Program Check Message is just letting you know that this specific OUT coil is used in multiple stages.  If the stages are "mutually exclusive", that is never enabled at the same time, you are fine.  However, this message is just to let you know that, say you are using OUT Y22 in SG S1, S2, and S4 (and they are in that order in your code-block), and SG S2 and SG S4 will be on at the same time (this can be done using SGSET or SGDIVRG), then the OUT Y22 input logic rung in SG 4 will "win" since it is "later" in the scan.

SG S1
STR X0
OUT Y22
...

SG S2
STR X1
OUT Y22
...

SG S4
STR X2
OUT Y22

If S2 and S4 are both enabled, and X1 is ON, and X2 is OFF, Y22 will be "ON" for a small part of the scan (from the OUT Y22 instruction on SG S2 because X1 is ON) then turn back OFF for the remainder of the scan (from the OUT Y22 instruction in SG S4 because X2 is OFF).  So then, at the bottom of the scan, when Outputs are updated, Y22 will be OFF.

Typically, though, S2 and S4 are part of a "sequence" and will NOT BOTH be enabled at the same time.  So Y22 will be ON or OFF based on ONE rung state (the one in S1, S2 or S4), or will be OFF if NONE of those stages are enabled.

So this Program Check message is just making you aware that it's probably OK, but you need to be sure the stages are "mutually exclusive", otherwise "last one wins".

[DLTimmons]

Thanks

[ATU]

I prefer to put all of my outputs in one place at the bottom of the scan and use internal bits or'd together. I refer to these outputs as "Virtual Outputs".This takes a little more time to setup, however it makes troubleshooting easier as you can look in one place to see what is activating an output. Works great to isolate runtime outputs from diagnostic functions. Also, if you have some interlocking between outputs, you put them in one place.  For instance if you have a set of valves that only one needs to be on at a time, that is the place to do that so that no matter how you use the outputs in the program, they are always interlocked. 

[DLTimmons]

I prefer to put all of my outputs in one place at the bottom of the scan and use internal bits or'd together.

I had thought of that just, want make sure there not a different way.

[LWgreys]

Controlling a single output from multiple stages can be done with a cast.
For instance:
C1008:UB not equal to zero - OUT Yxx
This way any OUT C1008 to OUT C1016 in any active stages will turn on the Yxx.
Interlocks can be built into the rung using casts also.

[mhw]

For those of us that use an "out' in multiple locations, it would be great to have status indication in the cross reference view.

[franji1]

For those of us that use an "out' in multiple locations, it would be great to have status indication in the cross reference view.

Are you wanting the Boolean stack status of the OUT coil instruction at that specific instruction in the program, or ?

[mhw]

Hopefully a picture is worth a 100 words.

[franji1]

The status reported is from the bottom of the ladder scan, so all of the C26 status values would be identical.  That would be helpful for most instruction elements, but not helpful when using multiple OUT coils.

There is currently no mechanism for collecting the status of an element at multiple program addresses within a single scan, although the idea has been discussed before.