Host Engineering Forum
General Category => Do-more CPUs and Do-more Designer Software => Topic started by: Mike@Forshock on March 04, 2020, 12:26:53 PM
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Firewall/Security:
There seems to some focus on security in regards to the communication (dedicated memory locations) and we have implemented a "software" implementation (specific value within specific register before processing Modbus registers into internal memory location, eg. MHR2048=1234, run "Subscribe" events).
Within the Server setup add a list of "authorized IP and/or HW Address (MAC)" for publishing to the server address (MHR, MC, DL, etc.)
This is how a few devices from different manufacturers has addressed this basic security.
MQTT Broker:
I mixed terms... Meant broker, protocol converter.
Other than those, have developed a few custom applications and some "generic" deployments.
Keep up the good work.
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We are planning to add a white list feature, probably in 2.8. The plan to make it generalized to all server functions.
Being a MQTT converter is a significantly bigger effort, mostly due to the storage requirements of QoS 2. We are definitely moving toward a higher performance processor platform that would make it possible to do. That function would probably be a co-processor feature, rather than PLC. We like the idea of dual Ethernet with a Web-facing port and an internal port, and have already discussed having an MQTT broker on the internal, and an MQTTS client external.
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Glad to here about the whitelisting.
Would this processor upgrade be in-place to existing lines or a new model/form-factor?
Perhaps using only QoS 0 or 1, reduce the complexity and processing requirements of 2, which is kind of overkill if everything is timestamped and quality monitored like OPC data. I dont pretend to know anything about the backend of MQTT or your firmware, I am sure you guys know full well the capabilities of each and how you must use the resources given.
Thanks again.
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Would this processor upgrade be in-place to existing lines or a new model/form-factor?
Kinda yes to both. We envision a significant upgrade to BRX (first) as well as a new higher end I/O platform (later). We are in the early design stage of the BRX improvements.