Host Engineering Forum

General Category => Do-more CPUs and Do-more Designer Software => Topic started by: ERokc on March 25, 2015, 02:53:03 PM

Title: Question on STAGE logic
Post by: ERokc on March 25, 2015, 02:53:03 PM

I want STAGE 10 to stay enabled until the program it is in HALTs.

S1  includes SGSET S10, no JMP

S10 includes SGSET S11, no JMP

S11 JMP S12

S12 JMP S13

S13 SGRST S13

S1 & S10 are still enabled, S11,12,13 disabled (until logic in S10 enables S11 again), right?

Title: Re: Question on STAGE logic
Post by: BobO on March 25, 2015, 02:56:51 PM

Quote from: ERokc on March 25, 2015, 02:53:03 PM

I want STAGE 10 to stay enabled until the program it is in HALTs.

S1  includes SGSET S10, no JMP

S10 includes SGSET S11, no JMP

S11 JMP S12

S12 JMP S13

S13 SGRST S13

S1 & S10 are still enabled, S11,12,13 disabled (until logic in S10 enables S11 again), right?

Yup.